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计算机科学与技术汇刊

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ISSN Print:2327-090X

ISSN Online:2327-0918

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Paper Infomation

Network on Chip-based Fault Tolerant Routing Algorithm and Its Implementation

Full Text(PDF, 235KB)

Author: Shuyan Jiang, Shanshan Jiang, Peng Liu, Yue Liu, He Cheng

Abstract: In this paper, a new fault-tolerant routing algorithm is presented in order to effectively improve the fault-tolerant performance of NoC. Based on a classical XY dimension routing algorithm, this design realizes a fault-tolerant routing algorithm of a single routing error by increasing its adaptability, and maintains the advantages of the XY routing algorithm, such as simpleness, hardware overhead, and scalability. Then a 3*3 structure of 2D-mesh Noc is simulated in ISE Design Suit 14.1 platform. Experiment results show that the proposed fault-tolerant routing algorithm proposed can complete the functions of routing data forwarding and tolerance of a single fault on NoC.

Keywords: Network on Chip; Fault-tolerant; Routing Algorithm; Topology

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